1. Technical Field
The disclosed subject matter relates to a system for generation of low jitter clock signals. More particularly, the subject matter relates to a system for providing a low jitter clock signal for wireless circuits, such as a Bluetooth circuit or a GPS circuit.
2. Description of the Related Art
Wireless technologies such as Bluetooth, Wi-Fi, and WLAN are increasingly becoming the preferred modes of network communication through mobile as well as fixed wireless communication devices. Wireless technologies are generally implemented through complex electrical circuits including a variety of analog blocks and digital blocks. The analog blocks include components, such as pre-amplifiers, analog filters, and wireless circuits. The digital blocks include components, such as microcontrollers and digital signal processing (DSP) accelerators. Generally, the analog and digital blocks are either integrated on a single chip or placed in close proximity to provide cost effective and compact wireless devices. For this, in one approach, various components, such as a clock generator and a power supply, which are common to different blocks are shared amongst the different blocks on a chip.
Although such an approach involving component sharing significantly reduces space constraints on the chip, the signals of the shared components can interfere with each other and with clock signals generated by the clock generator during operation of the chip. This interference can be caused due to overlapping of noise from the analog and the digital blocks, both being directly or indirectly coupled to the clock generator through a common power supply, thereby causing distortion in the clock signals. The distorted clock signals suffer from various imperfections, such as frequency drifts, phase shifts, and jitters, which adversely affect the desired RF signal output from the chip.
Generally, a jitter may get introduced in the clock signal due to a change in current across various current carrying blocks, such as a radio-frequency (RF) transceiver circuit, output buffers, and audio drivers. Such fluctuations can occur due to sudden activation and deactivation of the current carrying blocks. The fluctuations in the current across different blocks get coupled to the clock signals through a shared conducting path or a common power supply shared between the current carrying blocks and the clock generator. Generally, the shared conducting path of the common power supply contributes to large common impedance, due to which any fluctuation in current flowing through the current carrying blocks or the clock generator stimulates an unwanted phase shift in the clock signals.
Additionally, the clock generator and the digital blocks share a common power supply and common ground connections. As a result, frequent variations in the electrical state of the digital blocks introduce jitters in the clock signals due to coupling between the common power supply and the clock signals. Moreover, a fluctuating power supply provided by a direct current-to-direct current (DC-DC) converter to various circuits, such as a clock divider circuit, may introduce jitters in the clock signals passing through these circuits due to capacitive and magnetic couplings between the clock signals and the applied power supply.